System On Chip Design leveraging Artificial Intelligence

Modern Day SoCs (System-on-Chips) are extremely complex systems comprising of billions of transistors, which have to be optimized for physical constraints, and verified for guaranteed bug-free operation. To manage this level of complexity, the use of automated methods, and traditional machine-learning techniques have been adopted early in the SoC Design community. The Major departure of our approach from the state-of-the-art is the use of novel Neural Networks approaches and specific related methodologies to solve the problems addressed by the Electronic Design Automation (EDA) industry. In this project, we mostly focus in two key steps. Namely, the design space exploration, and front-end functional verification, in line with our industrial partner Arteris. The aim of our project is to develop neural network architectures, and associated datasets/tools for:Firstly, optimal design space exploration;Secondly, for single-shot placement/routing, which can then be used for physical constraints-aware design space exploration;And thirdly, for automatic generation of tests to maximize verification coverage of a SoC design; The main innovative step in this project is the use of artificial neural network techniques such as MolGANs(Molecular Generative Adverserial Networks), GNN (Graph Neural Networks) and associated method which are not used for EDA problems. The impact of this project will be mainly through our industrial partner Arteris IP SAS, but also through scientific publications, and code contributions to open-source tools.